1. Field of the Invention
The present invention relates to a method for manufacturing a thin film capacitor having superior leakage current characteristics and dielectric breakdown voltage characteristics. More particularly, the present invention relates to a method for manufacturing a thin film capacitor having the superior characteristics above in which formation of hillocks is suppressed during the manufacturing process of the thin film capacitor and which thereby prevents deterioration in dielectric breakdown voltage and increase in leakage current density caused by hillock generation.
2. Description of Related Art
Electronic devices such as a dynamic random access memory (DRAM), a ferroelectric random access memory (FeRAM), an RF circuit or the like are provided with a capacitor. However the demand for higher integration and miniaturizing of devices in recent years has resulted in a corresponding reduction in the area occupied by the capacitor in a device. A capacitor has a basic structure which includes an upper electrode, a lower electrode and a dielectric layer sandwiched between the electrodes. The capacitance of a capacitor is proportional to the surface area of the electrode and the dielectric constant of the dielectric layer and, on the other hand, is inversely proportional to the distance between the electrodes, that is to say, the thickness of the dielectric layer or the like. Since there is a limit on the thickness of the dielectric layer, a dielectric material with a higher dielectric constant must be used in the dielectric layer in order to conserve a high capacitance in the limited occupied area.
For that reason, in contrast to conventional materials with a low dielectric constant including SiO2, Si3N4 or the like, attention has focused on dielectric thin films formed from perovskite oxides including strontium titanate (“SrTiO3”), barium strontium titanate (hereafter referred to as “BST”), lead zirconate titanate (hereafter referred to as “PZT”) and the like. Furthermore a method of forming a dielectric thin film includes a chemical solution method such as a sol-gel method and the like (for example, see Japanese Unexamined Patent Application, First Publication No. S60-236404 (page 6, right upper column, line 10 to left lower column, line 3)) in addition to physical vapor deposition methods such as vacuum deposition methods, sputtering methods, laser ablation methods and the like, and chemical vapor deposition methods such as metal organic chemical vapor deposition (MOCVD) and the like. In particular, sol-gel methods have the advantage of facilitating formation on a large surface area of the substrate at a low manufacturing cost due to the lack of a requirement for a vacuum process in contrast to CVD methods, sputtering methods and the like. Moreover since modification of the components of the composition used in formation of the dielectric thin film facilitates the enablement of a theoretical ratio in the composition in the film in addition to obtaining an extremely thin dielectric thin film, it is expected to provide a mass-production method for formation of a thin film capacitor.
However in this area of thin film capacitors, there are outstanding issues regarding problems such as deterioration in dielectric breakdown voltage characteristics and leakage current characteristics which are thought to result from high-temperature calcining during the manufacturing process. For example, a thin film capacitor is manufactured by a general manufacturing process as described hereafter. Firstly, an adhesion layer is formed on a substrate which has an insulation film such as a SiO2 film or the like. Then a lower electrode is formed using a starting material such as a noble metal such a Pt or the like on the adhesion layer. Thereafter a composition for use in thin film formation is coated and dried on the resulting lower electrode. After the coating is formed, a dielectric thin film is formed by calcining and crystallization of the substrate which has the coating, and an upper electrode is formed on the resulting dielectric thin film.
In the above manufacturing process, in particular, the calcining temperature for crystallization during the deposition process of the dielectric thin film reaches a temperature of more than 800° C. As a result, the dielectric thin film undergoes minute cracking or bubbling due to deterioration of the lower electrode or rapid contraction of the film caused by the high-temperature calcining and, as a result, deterioration in dielectric breakdown voltage characteristics and leakage current characteristics result. In order to avoid these types of disadvantages which are associated with high-temperature calcining, a technique has been disclosed which deposits a dielectric thin film using a lower calcining temperature than conventional techniques (for example, see Japanese Patent Publication No. 3146961 (claim 1, claim 3 and paragraph [0015]) and Japanese Patent Publication No. 3129175 (claim 1, claim 2 and paragraph [0017]). These techniques execute deposition using a lower temperature of approximately 450° C. to 800° C. by adding a Si component in a predetermined ratio in addition to principal components such as Ba, Sr, Ti and the like to the composition used for thin film formation.
Application of the above type of high-temperature heat process includes further disadvantages such as the production of semispherical protrusions of approximately the same size as the thickness of the lower electrode which are termed “hillocks” on the interface between the dielectric thin film and the lower electrode (on the lower electrode side). These hillocks cause deterioration in dielectric breakdown voltage characteristics and leakage current characteristics in the same manner as cracking or bubbles produced in the dielectric thin film. When a hillock is produced, the film thickness of the dielectric thin film at that position is extremely thin in comparison to other portions and therefore the film thickness of the dielectric thin film lacks uniformity. Consequently leakage current also increases between the upper electrode and the lower electrode when forming a capacitor and dielectric breakdown voltage also deteriorates.
However in a manufacturing process for a thin film capacitor, in addition to calcining to crystallize the coating, the adhesion characteristics between the adhesion layer and the lower electrode are improved by an annealing process using a predetermined temperature which is applied during the formation of the adhesion layer or after forming the lower electrode and prior to coating of the composition for forming the thin film (for example, see Japanese Unexamined Patent Application, First Publication No. 2008-227115 (paragraph [0024], paragraph [0027]).